Process multiple files in a directory by Makefile.
SOURCES := $(wildcard *_conversion.txt) TARGETS := $(patsubst %_conversion.txt, %_uniq.txt, $(SOURCES)) .PHONY: all all: $(TARGETS) %_uniq.txt: %_conversion.txt > command $< > $@
Tag: make
Makefile to use with Pandoc using pattern rules.
OUTPUT = ../output
%.docx: %.mdown
pandoc -s --biblio bibliography.bib --csl cell.csl -o $(OUTPUT)/$@ $<
%.tex: %.mdown
pandoc -s --biblio bibliography.bib --csl cell.csl -o $(OUTPUT)/$@ $<
Usage:
make introduction.docx
Adapted from
http://stackoverflow.com/questions/6577176/makefiles-and-wildcards
Defining Macros on the Command Line
Macros can be defined on the Make command line. For example:
make CFLAGS=–ms
would start up Make and define the macro CFLAGS with the value “–ms”. Macros defined on the command line take precedence over macros of the same name defined in the makefile.
If a command-line macro contains spaces, it must be enclosed in double quotes as in:
make “CFLAGS=-ms -z -p”
http://www.opussoftware.com/tutorial/TutMakefile.htm