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Tag: make

  • Process multiple files in a directory by Makefile…

    cliquez ceci Process multiple files in a directory by Makefile.

    SOURCES := $(wildcard *_conversion.txt) TARGETS := $(patsubst %_conversion.txt, %_uniq.txt, $(SOURCES)) .PHONY: all all: $(TARGETS) %_uniq.txt: %_conversion.txt > command $< > $@

  • Makefile to use with Pandoc using pattern rules…

    Makefile to use with Pandoc using pattern rules.

    OUTPUT = ../output

%.docx: %.mdown
    pandoc -s --biblio bibliography.bib --csl cell.csl -o $(OUTPUT)/$@ $<
%.tex: %.mdown
    pandoc -s --biblio bibliography.bib --csl cell.csl -o $(OUTPUT)/$@ $<

    Usage:

    make introduction.docx

    Adapted from
    http://stackoverflow.com/questions/6577176/makefiles-and-wildcards

  • Defining Macros on the Command Line Macros can…

    Defining Macros on the Command Line

    Macros can be defined on the Make command line. For example:

    make CFLAGS=–ms
    would start up Make and define the macro CFLAGS with the value “–ms”. Macros defined on the command line take precedence over macros of the same name defined in the makefile.

    If a command-line macro contains spaces, it must be enclosed in double quotes as in:

    make “CFLAGS=-ms -z -p”

    http://www.opussoftware.com/tutorial/TutMakefile.htm